CONTENTS | [DIR] Top-level directory | |-- README [FILE] README text file |-- INSTALL [FILE] Installation notes |-- HISTORY [FILE] Release history |-- LICENSE [FILE] License agreement and copyright notices | |-- source [DIR] Top-level directory for RTL source files. | | | |-- dsp [DIR] Top-level directory for digital signal processing related RTL modules | | | | | |-- fft [DIR] Top-level directory for FFT processor RTL modules | | | | | | | |-- common [DIR] RTL modules related to FFTs but common to more than one FFT core | | | | `-- fft_r2_bf.v [FILE] Configurable pipelined radix-2 DIF FFT butterfly unit combined | | | | with twiddle-factor multiplications. Efficiently implements | | | | wide-input complex-multiplication by inferring 2x DSP48 tiles | | | | as MACs (when available on the FPGA) | | | | | | | |-- r22sdf [DIR] RTL modules related to radix-2^2 SDF FFT processor core | | | | |-- fft_r22sdf.v [FILE] Top-level structural module of the radix-2^2 SDF FFT processor core | | | | |-- fft_r22sdf_bf2.v [FILE] Implements a radix-2^2 butterfly with feedback (structural) | | | | |-- fft_r22sdf_bf2i.v [FILE] Implements the BF2-I butterfly of the radix-2^2 SDF FFT algorithm | | | | |-- fft_r22sdf_bf2ii.v [FILE] Implements the BF2-II butterfly of the radix-2^2 SDF FFT algorithm | | | | |-- fft_r22sdf_tfm.v [FILE] Pipelined twiddle-factor multiplication unit of the radix-2^2 SDF FFT algorithm | | | | | | | | | |-- matlab [DIR] Contains Matlab scripts for generating radix-2^2 SDF FFT twiddle-factor ROMs | | | | | |-- fft_r22sdf_rom_gen.m [FILE] Matlab script for generating radix-2^2 SDF FFT twiddle-factor ROMs | | | | |-- roms [DIR] Contains twiddle-factor ROMs generated by fft_r22sdf_rom_gen.m | | | | | |-- fft_r22sdf_rom_*.v [FILE] Twiddle-factor ROMs generated by fft_r22sdf_rom_gen.m | | | | |-- trialsynths [DIR] Contains trial-synthesis makefiles and DUT instantiation wrappers | | | | | |-- fft_r22sdf_ts.v [FILE] Generic DUT instantiation wrapper for trial-synthesis | | | | | |-- fft256_r22sdf.mk [FILE] Trial-synthesis makefile for 256-point FFT instantiation | | | | | |-- fft1024_r22sdf.mk [FILE] Trial-synthesis makefile for 1024-point FFT instantiation | | | | | `-- fft4096_r22sdf.mk [FILE] Trial-synthesis makefile for 4096-point FFT instantiation | | | | `-- unittests [DIR] Contains functional verification test-benches and test vectors | | | | |-- fft_r22sdf_tb.v [FILE] Generic test-bench for the radix-2^2 SDF FFT processor | | | | |-- fft256_r22sdf.mk [FILE] Test-bench makefile for 256-point FFT simulation | | | | |-- fft1024_r22sdf.mk [FILE] Test-bench makefile for 1024-point FFT simulation | | | | |-- fft4096_r22sdf.mk [FILE] Test-bench makefile for 4096-point FFT simulation | | | | |-- tvin [DIR] Contains input vectors for functional verification test-benches | | | | | `-- *.dat [FILE] Input vectors for functional verification test-benches | | | | `-- tvref [DIR] Contains reference test-bench output vectors | | | | `-- *.txt [FILE] Reference test-bench output vectors | | | | | | | |-- r2cgs [DIR] RTL modules related to radix-2 CGS FFT processor core | | | | |-- fft_r2cgs.v [FILE] Top-level structural module of the radix-2 CGS FFT processor core | | | | |-- matlab [DIR] Contains Matlab scripts for generating radix-2 CGS FFT twiddle-factor ROMs | | | | | `-- fft_r2_rom_gen.m [FILE] Matlab script for generating radix-2 CGS FFT twiddle-factor ROMs | | | | |-- roms [DIR] Contains twiddle-factor ROMs generated by fft_r2_rom_gen.m | | | | | `-- fft_r2_rom_*.v [FILE] Twiddle-factor ROMs generated by fft_r2_rom_gen.m | | | | |-- trialsynths [DIR] Contains trial-synthesis makefiles and DUT instantiation wrappers | | | | | |-- fft_r2cgs_ts.v [FILE] Generic DUT instantiation wrapper for trial-synthesis | | | | | |-- fft256_r2cgs.mk [FILE] Trial-synthesis makefile for 256-point FFT instantiation | | | | | |-- fft1024_r2cgs.mk [FILE] Trial-synthesis makefile for 1024-point FFT instantiation | | | | | `-- fft4096_r2cgs.mk [FILE] Trial-synthesis makefile for 4096-point FFT instantiation | | | | `-- unittests [DIR] Contains functional verification test-benches and test vectors | | | | |-- fft_r2cgs_tb.v [FILE] Generic test-bench for the radix-2 CGS FFT processor | | | | |-- fft256_r2cgs.mk [FILE] Test-bench makefile for 256-point FFT simulation | | | | |-- fft1024_r2cgs.mk [FILE] Test-bench makefile for 1024-point FFT simulation | | | | |-- tvin [DIR] Contains input vectors for functional verification test-benches | | | | | `-- *.dat [FILE] Input vectors for functional verification test-benches | | | | `-- tvref [DIR] Contains reference test-bench output vectors | | | | `-- *.txt [FILE] Reference test-bench output vectors | | | | | | | `-- r2dif [DIR] RTL modules related to radix-2 DIF FFT processor core | | | |-- fft_r2dif.v [FILE] Top-level structural module of the radix-2 DIF FFT processor core | | | |-- matlab [DIR] Contains Matlab scripts for generating radix-2 DIF FFT twiddle-factor ROMs | | | | `-- fft_r2_rom_gen.m [FILE] Matlab script for generating radix-2 DIF FFT twiddle-factor ROMs | | | |-- roms [DIR] Contains twiddle-factor ROMs generated by fft_r2_rom_gen.m | | | | `-- fft_r2_rom_*.v [FILE] Twiddle-factor ROMs generated by fft_r2_rom_gen.m | | | |-- trialsynths [DIR] Contains trial-synthesis makefiles and DUT instantiation wrappers | | | | |-- fft_r2dif_ts.v [FILE] Generic DUT instantiation wrapper for trial-synthesis | | | | |-- fft256_r2dif.mk [FILE] Trial-synthesis makefile for 256-point FFT instantiation | | | | |-- fft1024_r2dif.mk [FILE] Trial-synthesis makefile for 1024-point FFT instantiation | | | | `-- fft4096_r2dif.mk [FILE] Trial-synthesis makefile for 4096-point FFT instantiation | | | `-- unittests [DIR] Contains functional verification test-benches and test vectors | | | |-- fft_r2dif_tb.v [FILE] Generic test-bench for the radix-2 DIF FFT processor | | | |-- fft256_r2dif.mk [FILE] Test-bench makefile for 256-point FFT simulation | | | |-- fft1024_r2dif.mk [FILE] Test-bench makefile for 1024-point FFT simulation | | | |-- tvin [DIR] Contains input vectors for functional verification test-benches | | | | `-- *.dat [FILE] Input vectors for functional verification test-benches | | | `-- tvref [DIR] Contains reference test-bench output vectors | | | `-- *.txt [FILE] Reference test-bench output vectors | | | | | `-- misc [DIR] RTL modules related to general purpose signal-processing functions | | |-- mult_35x18s.v [FILE] 2-stage pipelined signed multiplier with configurable input widths | | | up to 35x18 bits. Efficiently implements the wide-input multiplication | | | by inferring 1 DSP48 tile as a MAC and another as an 18x18-bit multiplier | | `-- unittests [DIR] Contains functional verification test-benches and test vectors | | |-- mult_35x18s_tb.v [FILE] Test-bench for the 2-stage pipelined 35x18-bit signed multiplier. | | |-- mult_35x18s.mk [FILE] Test-bench makefile for 2-stage pipelined 35x18-bit signed multiplier simulation | | `-- tvref [DIR] Contains reference test-bench output vectors | | `-- *.txt [FILE] Reference test-bench output vectors | | | `-- system [DIR] Top-level directory for system-wide definitions, directives and functions | |-- system.vh [FILE] System-wide definitions, compiler directives and constant functions | |-- unittest.vh [FILE] Unit-test testbench support header | |-- unittest.v [FILE] Unit-test support tasks | `-- ut_math.v [FILE] Unit-test math library | `-- bldstore [DIR] Generic makefile fragments included by top-level makefiles | |-- synthesis [DIR] Makefile fragments related to synthesis | |-- makefile [FILE] Generic makefile fragment for synthesis | `-- xilinx [DIR] Makefile fragments for synthesis using Xilinx ISE 12.x tools | |-- disp-warns [FILE] Synthesis warning parser/highlighter | |-- makefile [FILE] Make rules for synthesis, translate, map and place&route using Xilinx ISE 12.x | |-- trce.xtm [FILE] Options for post place&route static timing analysis | |-- trialsynth.ucf [FILE] Trial-synthesis clock constrains for place&route | `-- trialsynth.xcf [FILE] Trial-synthesis clock constrains for physical synthesis | `-- testbench [DIR] Makefile fragments related to building test-benches |-- makefile [FILE] Generic makefile fragment for building test-benches `-- xilinx [DIR] Makefile fragments for building test-benches for Xilinx ISim simulator |-- isim-cmdline.tcl [FILE] TCL script to drive the ISim simulator in command-line mode (batch mode) |-- isim-gui.tcl [FILE] TCL script to drive the ISim simulator in GUI mode `-- makefile [FILE] Make rules for test-bench compilation and test vector matching Copyright (c) 2010-2012, XIONLOGIC LIMITED All rights reserved.